Monolithically Integrated E/D InAlN/GaN HEMT And Inverters On Sapphire Substrate

We have fabricated and characterized direct-coupled field-effect transistor (FET) logic (DCFL) Inverters based on monolithically integrated enhancement/depletion-mode (E/D-mode) InAlN/GaN high electron mobility transistors (HEMTs). The Enhancement-mode InAlN/GaN HEMT was realized by utilizing low damage BCl
₃
-based plasma gate-recess etching, which exhibits a peak transconductance (G
_m
) of 435mS/mm with a threshold voltage of 0.74V. When the supply voltage (V
_DD
) is biased at 2.5V, the E/D InAlN/GaN HEMTs inverter exhibits an output logic swing of 2.19V, a logic-low noise margin of 0.54V and a logichigh noise margin of 1.38V.