Impact of SiON tunnel layer composition on 3D NAND cell performance

In this paper, we investigate the tuning of a SiON tunnel oxide layer composition, in order to meet the memory operation performance requirements of a 3D NAND charge trap cell. The characteristics are compared to a VariOT ONO engineered barrier or pure SiO2. The results show that the N content increase in the SiON leads to important erase improvement at the expense of retention, therefore causing a trade-off between these two parameters. A low N content however can bring the required improvement in erase for large memory window, without compromising retention.