Verification of AMBA AXI On-Chip Communication Protocol

In the ever changing world where every day new IPs and chips are designed with less time to market, creating a very robust verification mechanism within a short duration is a big need of fast growing VLSI industry. With the advent of a standardized signal bus architecture used for interconnection of various modules of a system, system-on-a-Chip (SoC) design became the major integrated methodology for minimizing the design time of complete system. Now how to verify these on chip bus protocols is one of the grave challenges at hand, also traditional methods are inefficient for verifying large SoC. In this paper we have built a verification environment for AXI protocol using System Verilog (SV) where we had verified AMBA AXI Protocol achieving successful Write and Read Operations for incrementing burst feature with a saleable test bench architecture.