I. Introduction
Due to the increasing demand for fast computational devices capable of operating at terahertz clock frequencies, researchers have proposed a variety of device architectures including geometric diode [1]–[3]. On the other hand, scaling of microelectronic devices causes short channel effects which limit high frequency operation. A novel planar nanoelectronic device called self-switching device was first conceptualized and realized by Song et al. in 2003 utilizing two L-shaped trenches in InGaAs heterostructures [4]. The device working resembles to a diode, however, does not require any doping junctions and/or Schottky barrier to produce non-linear I-V characteristics. The planar architecture of device, i.e. the electrical contacts are on the same plane as of device, reduces the parasitic effects enabling high frequency operation. SSDs have been studied and fabricated from wide variety of materials ranging from Silicon-on-Insulator to two dimensional electron gases (2DEGs) to novel materials like Graphene and Molybdenum disulphide (MoS2) [5]–[8]. The high frequency operation in THz range suggests that SSDs can be employed for variety of applications including communication and imaging (security/medical). The theoretical studies using Monte-Carlo simulations have demonstrated that SSDs can also be used as microwave/terahertz emitters [9]. Since, SSD operation depends upon side-gated field modulated carrier transport inside the channel analogous to conventional transistors, hence, subthreshold swing is to be considered for estimating on-off ratios of the device. The latter devices work on thermionic emission or tunneling barrier and are having typical subthreshold swing of about 60 mV/decade [10]. Similarly, SSDs can also be designed with low subthreshold swing for applications requiring high on-off ratios, low power and low voltages.
(a) Three-dimensional schematic of SSD illustrating the device geometry and dimensions. (b) Cross-sectional view of the device structure indicating 2DEG and materials used.
(a) At zero bias, channel of SSD is closed due to surface states across the trenches. (b) Positive bias of +5V opens up the channel fully by attracting charge carriers (electrons) inside the channel. However, negative bias −5V completely pinches off the channel conduction due to increased electron concentration along the trenches (c). The variation of CW from 10 to 50 nm at bias voltage of 0, +5 and −5V decreases the electric field distribution across the device (d), (e) and (f), respectively.
(a), (b), (c) represents energy levels across SSD having CW=50 nm and CL=900 nm depicting change in barrier potential at bias voltages of 0, +5 and −5 V, respectively, suggesting diode like characteristics at doping concentration of 2×1016cm-3. (d)-(i) the variation in carrier concentration inside the channel leads to the saturation of current at higher potentials.