An Efficient Convolutional Neural Network Accelerator on FPGA

Accelerating the convolutional neural network (CNN) is very import for artificial intelligence. In this paper, an efficient CNN accelerator is proposed and implemented on Xilinx ZC702 FPGA. By applying the multiplication result reuse and row stationary technique, we achieved 1.5× speed up over referenced design while consuming less hardware resource. The proposed design can help to speed up the convolutional operation by reusing multiplication results and save power consumption.