Software and Hardware Co-Verification Technology Based on Virtual Prototyping of RF Soc

Software and hardware co-verification is a validation technology developed with RF SoC technology. The main purpose of the software and hardware co-verification is to verify the function and timing of software and hardware interface of system on chip, to verify the hardware and software design of system on chip, and to develop application software before coming back of the tape-out chip. Software and hardware co-verification can make software engineers come into contact with the hardware design as soon as possible, so that the software development and hardware design can be carried out concurrently. Compared with the traditional serial development model of software developing after hardware, software and hardware co-verification can greatly shorten the development cycle of the whole project. At the same time, software and hardware co-simulation provides the stimulation signal in real system, which has higher reliability compared with the test signal artificially added, so that the accuracy of hardware verification can be greatly improved. The software and hardware co-simulation uses simulation technique to run software on the simulated hardware model. Software and hardware co-simulation can completely simulate the working environment of the final product, and has the comprehensive verification capability for software and hardware system from signal waveform to source code debugging.