A High Performance Encryption System Based on AES Algorithm with Novel Hardware Implementation

Advanced Encryption Standards (AES) defined by National Institute of Standards and Technology (NIST) is widely used for symmetric cryptography. In this paper, a high performance encryption system based on AES is proposed, in which AES can work at all three modes including AES-128, AES-192, and AES-256. In addition, the proposed AES implementation is piped into 4 stages for each round operation with decryption module reusing some circuits of encryption module, which leads to a performance improvement in term of area and throughput. Furthermore, a design of 1
^st
order mask has been proposed which can resist 1
^st
order differential (or correlation) power attack. Our design can be easily expanded to other SPN-based primitives.