A 2-D Predistortion Based on Profile Inversion for Fully Digital Cartesian Transmitter

A novel 2-D digital predistortion (DPD) algorithm for fully digital Cartesian transmitter is proposed. The nonlinearity of the digital power amplifier in the digital transmitter necessitates DPD for linearization. In order to shorten the setup time of predistortion coefficients in the lookup table (LUT), a profile inversion-based method is adopted. Compared to the traditional adaptive iterative method, the profile inversion method for DPD in this paper shortens the setup time to
$15~\mu \text{s}$
, which is possible for Long Term Evolution (LTE) time division duplex digital transmitter system to execute calibration within every frame. The algorithm is experimentally verified in a fully digital transmitter implemented in 65-nm general process CMOS technology with LUT size of 0.19 mm
²
, chip size of 2.7 mm
²
. The digital transmitter has achieved −35- and −32-dBc adjacent channel leakage ratio with 10-MHz LTE and 20-MHz 802.11g WiFi baseband feed in signals, respectively. The DPD improves the linearity of the transmitter by 21 dB for a 2-D constellation signal.