A Power Efficient Ka-Band MMIC Active Frequency Doubler with Output Amplifier

Design and realization of a two stage, 17.5 GHz to 35.0 GHz active frequency doubler with output amplifier using two GaAs based pHEMTs has been presented in this paper in MMIC form. Fabricated MMIC chip has achieved 10 dB of conversion gain at 35 GHz for 0 to 5 dBm of input power at 17.5 GHz. Saturated output power obtained is 15 dBm. Fractional bandwidth of more than 14% has been observed for 2 dB variation in output power. Total dc power consumption of the chip is 110 mW. Fundamental and spurious rejection is in excess of 45 dBc. Phase noise degradation through the circuit is close to 6 dB, which is the minimum theoretical value. The designed power efficient frequency doubler is highly stable, and capable of producing high quality output spectrum with sufficient power.