An Integrated Bias Voltage Control Method for SPAD Arrays

An integrated bias voltage control method is proposed for alleviating the impact of breakdown voltage non-uniformity in single-photon avalanche diode (SPAD) arrays. A shared resistor string digital-to-analog converter is utilized to provide an optional potential for the anode of SPAD. Adjusting the anode voltage of SPAD according to its breakdown voltage can guarantee each detector in the array with similar excess bias voltage. The circuit was fabricated in TSMC 0.18-
$\mu \text{m}$
CMOS technology. The measurements show that the bias voltage of each pixel is adjustable from 0 to 1.2 V with the step length of 80 mV and the maximum error is 10 mV. With the bias voltage control method, the performance difference of the detectors in the array is substantially reduced.