Hot carrier reliability of lateral DMOS transistors

The focus of this paper is on the degradation induced by hot-electrons in lateral DMOS transistors. The physical justification for the abandonment of the existing CMOS test methods is explained. Simulation results supporting the hot-carrier phenomenon occurring are reported and both parametrically and experimentally determined hot-electron safe-operation-areas (HE-SOA) are examined for reliable device operation of 20 V LDNMOS and 20 V LDPMOS.