Design of 2×2 vedic multiplier using GDI technique

In arithmetic operations, multiplication plays a vital role. In signal processing the multiplication is an import operation such as Fast Fourier transform, convolution and multiply and accumulate unit (MAC). In DSP applications most of the systems dominated by the multiplication block, so we need to develop the faster multipliers. Vedic multiplier is developed for the faster Multiplication In this paper, concept of UrdhvaTiryagbhyam has been used i.e. the multiplication can be done by vertically and cross wise. In this paper we designed the high speed and low power Vedic multiplier based on Vedic sutra UrdhvaTiryagbhyam. So the multiplier is key parameter of power consumption and delay in the processors, in order to reduce the power consumption and delay of the multiplier the GDI (Gate Diffusion Input) Technique is used.