Dummy gate critical dimension uniformity improvement for 14nm and beyond

In advanced CMOS technology node, the dummy gate critical dimension (CD) and its line head to head (HTH) space CD will directly affect the device performance and its long term reliability. Macro- and micro-uniformity of dummy gate CD and its HTH CD are key parameters for wafer yield and product quality. In dummy gate process, both the thickness uniformity of film stack (silicon nitride, amorphous carbon and etc.) and the CD uniformity (CDU) of lithography line will influence final dummy gate CDU. Feed forward APC mode for dummy gate CDU improvement requests a long term work in semiconductor manufacturing which is not a focus point here. In this paper, an advanced temperature compensation function of a commercial inductively coupled plasma (ICP) etcher will be mentioned. At the same time, both dummy gate and HTH CDU tuning by this function with feedback mode will be introduced. Some possible enhanced solutions of CDU improvement will also be addressed in this paper.