A review and analysis of communication logic between PL and PS in ZYNQ AP SoC

Xitinx ZYNQ-7000 AP SoC consists of a Programmable Logic (PL)(FPGA) and Processing Subsystem(PS) (ARM Cortex-A9). The communication logic/interface between the PL and PS is an essential component of ZYNQ Architecture for data transfer. The AXI Interconnect acts as an important communication link between PL & PS for bi-directional data transfer, compared to other available options. This paper explores all possible communication logics/interfaces to transfer data within ZYNQ-7000 AP SoC.