High-isolation Stacked RF Switch using dc-lift and Feedforward Cancellation Techniques in Standard 65 nm CMOS

Isolation of switches is critical parameter for CMOS system-on-chip (SoC) transceivers. This paper presents a high-isolation stacked CMOS RF switch using dc-lift and feedforward cancellation techniques to improve isolation. The lifting resistors are employed to prevent the conduction of the junction diodes in the OFF state. Furthermore, by deliberately sizing these resistors multiple feedforward paths are created, which further improve isolation without using additional components. A single-pole single-throw (SPST) switch is implemented in a standard 65 nm CMOS process to demonstrate the concept. Measured isolation is 41 dB and insertion loss is less than 1.8 dB at 2.55 GHz. The active region is smaller than 0.02 mm
²
.