Security of hardware architecture, design and performance of low drop-out voltage regulator LDO to protect power mobile applications

This paper present a new Low Drop-Out Voltage Regulator (LDO) and highlight the topologies and the advantages of the LDO for hardware security protection of Wireless Sensor Networks (WSNs), this integrated circuits are considered as an ideal solution in low power System on-chip applications (SOC) for their compact sizes and low cost. The advancement in low-power design makes it possible that ubiquitous device can be powered by low-power energy source such as ambient energy or small size batteries. In many well supplied devices the problem related to power is essentially related to cost. However for low-powered devices the problem of power is not only economics but also becomes very essential in terms of functionality. Due to the usual very small amount of energy or unstable energy available the way the engineer manages power becomes a key point in this area. Therefore, another focus of this dissertation is to try finding ways to improve the security of power management problems. Complementary metal oxide-semiconductor (CMOS) has become the predominant technology in integrated circuit design due to its high density, power savings and low manufacturing costs. The whole integrated circuit industry will still continue to benefit from the geometric downsizing that comes with every new generation of semiconductor manufacturing processes. Therefore, only several CMOS analog integrated circuit design techniques are proposed for low-powered ubiquitous device in this dissertation. This paper reviews the basics of LDO regulators and discusses the technology advances in the latest generation of LDOs that make them the preferred solution for many points of load power requirements. The paper will also introduce characteristics of CMOS LDO regulators and discuss their unique benefits in portable electronics applications. these new device offer a real advantages for the power management security of new applications mobile. Power efficiency and some practical issues for the CMOS implementation of these LDO structures are discussed.