Implementation of energy efficient FIR Gaussian filter on FPGA

Finite Impulse Response (FIR) is a type of digital filter that has no feedback and its impulse response is. In the following paper, power analysis has been done by applying energy efficient techniques to make FIR more energy and power efficient device. Input Output (IO) standard scaling technique has been used in which different 8 IO standards of High Speed Transceiver Logic (HSTL) and High Speed Transceiver Logic Digital Controlled Impedance (HSTL DCI) family has been analyzed. Static and dynamic power dissipation has been calculated using X Power Analyzer. It has been extruded from the analysis that it is always better to work on HSTL_I IO standard in case of HSTL logic family and HSTL_DCI IO standard of HSTL DCI family in comparison to the other IO standards of the family since these are the least power consuming IO standards. In this way by selecting the most energy and power efficient IO standards Green FIR Filter can be made, in order to meet ever increasing energy and power crises as faced by world around.