On-Chip Ring Oscillator Based Scheme for TSV Delay Measurement

Due to the complexity of fabrication and bonding processes, TSVs are susceptible to delay defects and have become a serious concern in 3D ICs. To assure the quality and yield of 3D ICs, it is imperative to conduct effective delay testing for TSVs. In this paper, we present a novel on-chip ring oscillator based TSV delay measurement scheme for TSV delay defect detection. In the proposed scheme, three TSVs and the associated logic gates are implemented to construct a basic TSV propagation delay measurement unit. By configuring the control signals, three different oscillators can be created in the unit. By firstly measuring the oscillation periods of the three oscillators, the propagation delay of the target TSV can then be calculated with high resolution. Experimental results are presented to verify the effectiveness of the proposed scheme.