Generalized Algorithm of Reverse Mapping Based SVPWM Strategy for Diode-Clamped Multilevel Inverters

This paper presents a reverse mapping based space vector pulse-width modulation strategy for five- and seven-level diode-clamped multilevel inverters. In this method, the space vector is expressed as a sum of a contender vector and an error vector. Here, the actual sector, which contains the tip of the reference space vector, needs not to be found. The vector nearest to the reference space vector is the contender vector. By calculating the vector difference of the contender vector from the reference vector, the error vector is determined. Using translation method, the error vector is translated to the origin of space vector diagram. There will be (n-1) steps in space vector diagram for an n-level inverter. As the error vector amplitude will be less than one step of the space vector diagram, the two-level space vector method can be applied. To obtain a vector that is very close to the reference vector, the determined switching states can be added to the contender vector. This technique can be extended to any n-level multilevel inverter. The performance of five-level and seven-level diode-clamped multilevel inverters is presented using MATLAB/Simulink. The performance of inverters is evaluated by using induction motor load. The experimental results using field programmable gate array are presented for seven-level diode-clamped multilevel inverter.