SVM Strategies for Simultaneous Common-Mode Voltage Reduction and DC Current Balancing in Parallel Current Source Converters

Parallel-connected current source converters (CSCs) can be used to increase the power capacity and the flexibility of power conversion systems. However, this type of configuration needs to obtain proper dc current balancing through either passive methods or active PWM (pulse width modulation) strategies, in order to avoid overloading problems of a single converter. For the operation of transformer-less CSCs, another requirement is to reduce the common-mode voltage (CMV) associated with PWM strategies. As these two issues are mutually coupled, the conventional space vector modulation (SVM) and various types of enhanced methods reported so far cannot address them properly at the same time. To overcome this limitation, a modified SVM via two-layer small vector selection criteria is developed. Theoretical analysis and verification results show that the proposed method can reduce the magnitude of CMV to one-third of the value using the conventional SVM, and the accurate control of dc current balancing with reduced ripples can be obtained at both the steady and transient states.