Hardware implementation of support vector machine classifier using reconfigurable architecture

Support Vector Machines (SVM) are considered as one of the most commonly used pattern recognition techniques for various applications. In this paper, a novel attempt is made to design and implement SVM classifier using Reconfigurable architecture on a Xilinx Virtex-5 FPGA. The performance of proposed reconfigurable system is compared with its conventional non-reconfigurable architecture and the results are reported. In order to explain the functionality of the proposed system, design of digital circuits using SVM classifier is considered in this work. The proposed reconfigurable architecture can be easily adapted for various other applications too.