A Circuit-Based Approach for Characterizing High Frequency Electromigration Effects

A test chip for studying electromigration (EM) effects under various dc and ac stress conditions was implemented in a 32-nm-high-k metal gate process. The stress current, which can be either dc, pulsed dc, square ac, or real ac, was generated on-chip and applied to 60 devices under test (DUTs) in parallel. An on-chip voltage-controlled oscillator was designed to generate a stress frequency higher 1 GHz while on-chip metal gate heaters were used to raise the DUT temperature to >300 °C for accelerated testing. Both abrupt and progressive failures were observed under dc and pulsed dc stress modes. The abrupt failures could be further divided into two categories based on the final resistance value. Although no ac stress induced failures were observed during our extensive stress experiments, ac stress did have an impact on the subsequent dc EM lifetime. Two possible scenarios are given to explain the high frequency EM results.