Efficiency optimization design of DC-DC solid state transformer based on modular multilevel converters

In the recent decade, the solid-state transformer (SST) has been extensively investigated for the distribution systems. The basic idea of SST is to reduce the volume and weight of power transformer, as well as improve controllability and power quality of power systems. Among the existing SST topologies, modular multilevel converters (MMCs)-based SST is very promising due to its modularity and scalability, specifically for medium/high-voltage applications. Compared to the conventional full-bridge or half-bridge converters, MMC can generate controllable multilevel excitation ac voltage and potentially improve efficiency and controllability. In this paper, to minimize power losses, an optimization design strategy is proposed based on the optimum multilevel excitation voltage and optimum blocking voltage of semiconductor devices. The power losses are evaluated and compared based on semiconductor losses and core losses. The study results show that 1.2 kV and 1.7 kV Si IGBTs and 1.2 kV SiC MOSFET produce the minimum power losses under the selected multilevel excitation voltage. The study results also show the MMC-SST with the proposed optimization strategy has higher efficiency than the SST based on cascaded configuration.