Comparison of GPU and FPGA based hardware platforms for ultrasonic flaw detection using support vector machines

This study investigates the performance of different hardware platforms and development frameworks for efficient realization of an ultrasonic flaw detection algorithm based on the Support Vector Machine (SVM) classifier. The proposed algorithm is based on subband decomposition of ultrasonic signals followed by classification with a trained SVM model that uses subband filter outputs as feature inputs. Target host platforms include an FPGA-based Xilinx ZedBoard, a GPU-based Tegra System-on-Chip (SoC) and a high-performance computing (HPC) server with GPU accelerators. GPU development is done with CUDA library functions provided by NVIDIA and TensorFlow by Google. TensorFlow is a numerical computation library used primarily for building machine learning algorithms. RTL code for FPGA implementation is generated by System Generator tool by Xilinx. Implementation results show that while all platforms can achieve real-time operation with small data sets, scalability is a difficult challenge for embedded hardware. TensorFlow provides the shortest development time and enables code migration from servers to embedded systems.