Power integrity concepts for high-speed design on multi-layer PCBs

This article consists of a collection of slides from the author's conference presentation. Some of the specific areas/topics discussed include: PI module; PDN problem; geometry and inductance decomposition; PCB PDN design; circuit model behavior; logic transitions; voltage switching-dynamic current draw distrubances; conduction current path; power plane and capacitor location matrix; power plane location in layer stack; capacitor location; SMT decoupling; SMT capacitors; PCB PDN circuit model; voltage ripple separation; and package design flow.