Firmware architecture of the data acquisition system for the LabPET II mouse scanner

A new, highly pixelated, PET scanner dedicated to mouse imaging is being developed based on the LabPET II detector module. Each module includes four monolithic array of 4×8 avalanche photodiodes (APD) individually coupled to four 4×8 array of 1.12×1.12 mm
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scintillator pixels aimed at achieving submillimetric spatial resolution. A PCB routes the signals from four detector arrays to two 64-channel, mixed-signal, Application Specific Integrated Circuit (ASIC), forming a 128-channel readout unit. A new DAQ system was designed to interface this novel detector module. Its firmware architecture consists of 2 types of custom FPGA-based electronic boards processing data from the detector module. An embedded signal processing unit is in charge of data readout, corrections and sorting. It also features live energy histogramming and count rates computation. An FPGA-based coincidence, data communication and gating unit collects data from all embedded signal processing units and deals with coincidence detection together with random estimation and sends processed data to a host computer. In parallel to the detected events stream, a command and control flow was added for ASIC automatic calibration, electronic boards parameters setting and readout from the host computer. This firmware allows a real-time PET data processing without degrading the detector module performance.