Investigation on wafer warpage evolution and wafer asymmetric deformation in fan-out wafer level packaging processes

Fan-out wafer level packaging (FO-WLP) technology has been developed to shrink package size, to accommodate increasing I/O densities and to provide better electrical performance. However, wafer warpage induced during the process poses a threat to the yielding and reliability. In this paper, the warpage evolution during the FO-WLP process was investigated by theoretical calculation and finite element analysis (FEA). The effect of key parameters such as thickness ratio of die to total mold thickness was also studied to optimize the wafer warpage after the molding process. In 12-inch wafer process, the wafer often deforms in an asymmetric behavior such as cylindrical shape and this nonlinear or bifurcation behavior was also investigated by theoretical and FEA methods.