A 2–3 GHz high gain and high linearity current-reused LNA with wideband input matching

A wideband 2-3 GHz three-stage low noise amplifier (LNA) featuring current reuse, cascaded L-match input network, and multiple gated transistors method (MGTR) is designed in 0.18-μm CMOS technology. The current-reused topology is adopted to fulfill low power consumption, meanwhile, high gain and low noise are obtained. The cascaded L-match input network is used to enhance the input matching bandwidth. The MGTR is utilized to improve the linearity performance. Post-layout simulated results present a maximum power gain of 28.7 dB, a good input matching across 1.8-6.5 GHz and a high third-order input intercept point (IIP3) of-10.4 dBm. A noise figure (NF) of 3.1-3.3 dB is achieved within 2-3 GHz with a power dissipation of 6.2 mA from a 3 V power supply.