An FET-level linearization method using a predistortion branch FET

To reduce third-order intermodulation distortion (IMD3), a linearization circuit using a predistortion branch field-effect transistor (FET) was proposed and its performance was verified for a hybrid circuit. The method is based on the fact that IMD3 generated from main FET is nulled by that from a branch FET with optimized bias condition. For two-tone frequencies 900 and 904 MHz, the performance of the circuit showed up to 13.9 dB improvement in the output third-order intermodulation intercept point (OIP3) at its peak point and more than 6.3 dB for 0.2 V range of branch FETs gate-source bias. For its simple topology and improvement in OIP3, the method merits use in monolithic microwave integrated circuit (MMIC) amplifiers for low-to-medium power applications.