Approaching evolvable hardware to reality: The role of dynamic reconfiguration and virtual meso-structures

In this paper we shall address the possibility of incorporating a new degree of freedom in the design of electronic systems. It consists of providing the ability to evolve its internal meso-structure while in operation. This new design strategy is allowed by the features included in a new family of FPGA devices, which is called FIPSOC (field programmable system on a chip). Besides a programmable digital section composed of an array of LUT-like configurable cells, the device includes a configurable analog part and a general purpose microcontroller. Furthermore, the configuration scheme used for the programmable digital section allows for an efficient and fast realisation of dynamic reconfiguration principles. As we shall show in this paper, these properties offer two new on-line hardware evolution strategies, giving rise to what we have called virtual meso-structures.