Failure Characterization of Carbon Nanotube FETs Under Process Variations: Technology Scaling Issues

Carbon nanotube field-effect transistors (CNFETs), consisting of aligned semiconducting single-walled carbon nanotubes (CNTs), are promising nanoscale devices for implementation of high-performance, very dense, and low-power integrated circuits. Chemical synthesis and lithography processes are exploited to fabricate CNFETs. In the presence of subwavelength lithographic inaccuracies and chemical synthesis imperfections, the number of CNTs contained in a CNFET varies, which may lead to nonfunctional CNFETs. This paper presents a parameterized model for CNT-count distribution under combined lithographic and chemical synthesis imperfections. The proposed CNT-count model takes advantage of a new spatial CNT density metric which is easily and accurately extractable. We use the proposed model to investigate the impact of process variations on CNFET technology scaling. Results show that, to achieve 1-part-per-billion failure rate in 16-nm CNFET technology node, a synthesis process with a density of 450 CNTs/μm must be used when the CNFET width variation ratio is up to 20%. However, if the CNFET width variation ratio is reduced to 10% using a lithography resolution enhancement technique, a similar failure rate can be achieved with a chemical synthesis process that produces 150 CNTs/μm.