Total-ionizing-dose tolerance analysis of an optically reconfigurable gate array VLSI

Recently, radiation-hardened static random access memory (SRAM) - based field programmable gate arrays (FPGAs) are available for use in space radiation environments. Although such radiation-hardened SRAM-based FPGAs are programmable, the uses of radiation-damaged SRAM-based FPGAs are not allowed as well as application specific integrated circuits (ASICs). Their serial configuration is invariably damaged first by radiation. Therefore, their own configuration becomes impossible. However, if it were possible to use faulty gate arrays, some parts of which become permanently damaged by radiation as total-ionizing dose effects, then the total-ionizing dose tolerance of the programmable gate array would be increased drastically. To use a faulty programmable gate array, a parallel configuration architecture must be used instead of serial configuration architectures. If the parallel configuration architecture were used, then even if a part of the configuration circuits were to become damaged, then the other non-damaged gate array could be reconfigured correctly and could then be used. In this case, although the total-ionizing dose tolerance of a gate array VLSI is not varied physically, its allowable total-ionizing dose tolerance of the programmable gate array could be increased. Recently, optically reconfigurable gate arrays (ORGAs) have been undergoing rapid development. Actually, ORGAs can support a perfectly parallel configuration so that an ORGA allows the use of a faulty programmable gate array and thereby increases the total-ionizing dose tolerance of its programmable gate array. This paper presents the theoretical underpinnings of the benefits of parallel configuration on ORGAs in total-ionizing dose tolerance using both the designs of an ORGA and a currently available serial-configuration FPGA.