Threshold tuning method for arrays of split-gate nanostructure transistors in series

This paper presents a method to tune an arbitrary number of split-gate transistors in series to their threshold voltage, prior to initiating any particular experiment. The model accounts for device variations and considers coupled/uncoupled electrical gates and ballistic/ohmic addition of resistances. Experimental verification of this `zeroing method' is provided by detailed conductance measurements through a two-dimensional electron gas formed in a GaAs/AlGaAs heterostructure with two split-gate transistors in series and is extended to zero an array of up to nine split gates in series.