A high-reliability PCIe communication system for small FPGAs

High speed PCIe devices with Bus Master capability are flexible and competent tools for data acquisition systems, yet they require complex infrastructure and substantial resources. Usually embedded systems are implemented to deal with the complexity at the expense of increased resource utilization. In this paper we propose a standalone firmware system which has been optimized for minimal resource usage while having a relatively high throughput as a candidate for a high-reliability transfer system. We also present a Linux Device Driver that has in combination with the firmware been verified through accelerated reliability tests by long-duration random data transfers, on both consumer grade host PC and high end, server grade PC. This driver is designed for streaming DMA transfers and is capable of vectored transfers through Linux native writev. The concepts and limitations of the PCIe standard relevant to this application and the performance of the design are discussed.