Design of analog front end of passive UHF RFID tag

A sub-lV, 3μW analog front end (AFE) of UHF RFID tag complying with ISO 18000-6B standard is presented in this paper. In order to reduce total power, on-chip supply voltage is designed 0.95V. The design of rectifier, limiter, reference, regulator, modulator and demodulator worked under sub-lV are discussed in detail. The AFE circuit was fabricated in TSMC 0.18μm mixed-signal CMOS process with the size of 0.28mm2. Post simulation results show that the proposed AFE circuit operates at 0.95V with 3.1μA current consumption.