Demonstration of a 6H-SiC CMOS technology

Recent improvements in 6H-SiC enhancement-mode NMOS and PMOS device fabrication and performance have resulted in operational circuits up to 500/spl deg/C. These developments have now led to the first demonstration of monolithically integrated complementary MOSFET (CMOS) circuits in SiC. CMOS is an attractive technology because it is readily adaptable for mixed analog and digital applications. The availability of current source (active) loads makes it possible to generate large voltage gains with relatively small supply voltages and currents which has not been possible in SiC until now. CMOS also provides for low power (stand-by) digital circuits. Lower supply voltage operation and reduced circuit design complexity will enhance high temperature reliability.