A mixed mode background calibration technique for pipeline ADCs

This paper describes a mixed mode background calibration technique for pipeline analog-to-digital converter (ADC). The proposed calibration scheme uses an insignificant, low-speed, low-power, high-resolution sigma-delta ADC to determine error in digital domain. The calibration technique calibrates capacitor mismatch as well as finite opamp dc gain, while the digital redundancy compensates for comparator offset.