Low-Temperature 3D Chip-Stacking Using Compliant Bump

We demonstrate low-temperature 3D chip-stacking (number of bumps: 25,200, bump size / bump pitch: 11 ¿m / 20 ¿m, chip-stacking temperature: 30°C) using the compliant bump. Low-temperature 3D chip-stacking was carried out by mechanical caulking using compliant bump and doughnut-shaped electrode. This method is very effective in realizing 3D chip-stacking even at room temperature.