An embedded JTAG, system test architecture

IEEE 1149.1, The Standard Test Access Port and Boundary-Scan Architecture (JTAG) was written to provide standardized test access to surface mounted integrated circuits (ICs) whose high density packaging restricted physical test access. Although the four-wire (optionally five-wire) test port defined within the standard is commonly applied to test printed circuit boards (PCBs) in a factory, there is not yet a standard method for testing modules once they are installed in a system. This paper describes an architecture for extending the application of JTAG to system-level testing. It assumes reader familiarity with IEEE 1149.1.<
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