Stress-Induced Mobility Enhancement for Integrated Power Transistors

It is for the first time shown that integrated power transistors can benefit from mobility enhancement due to strained silicon, an effect that is usually only reported for deep submicron CMOS. Experimental validation is done by mu-Raman spectroscopy (muRS) measurements on a transistor cross- section. The silicon stress is measured to be in the order of several hundreds of MPa, yielding a reduction in drift resistance (Ron) of approximately 20%. A novel theoretical model relating Ron to V
_bd
, and including stress-induced mobility enhancement, is provided.