Specialized Scanning Electron Microscopy Voltage Contrast Techniques for LSI Failure Analysis

Several scanning electron microscopy voltage contrast techniques used for integrated circuit failure analysis are compared. A newer, simpler technique permitting the elimination of the topographic image information while retaining the voltage contrast information is described. This technique called Selective Voltage Contrast (SVC) also permits the viewing of voltages in a circuit as imposed by individual input level changes. Examples of the application of the technique are shown using bipolar integrated circuits and a charge coupled memory device.