Analysis of water diffusion path evolving from silicon dioxide and its influence on transistor hump

In this paper, a diffusion path of water (H/sub 2/O) from silicon dioxide (SiO/sub 2/) to the channel surface and its influence on the transistor's hump are investigated. It is shown that a SiO/sub 2/ film prepared by low pressure chemical vapor deposition (LPCVD) at 675/spl deg/C contains H/sub 2/O molecules, and they are diffused to the channel region during the high-temperature thermal processing. The diffused H/sub 2/O molecules increase the subthreshold leakage in the NMOS transistor due to boron segregation; however, the PMOS transistor is not affected due to phosphorus pile up. It appears that a thin layer of silicon nitride (Si/sub 3/N/sub 4/) deposited by LPCVD and nitrided gate oxide are effective to block H/sub 2/O diffusion. It is also revealed that the Si/sub 3/N/sub 4/ film slightly increases the leakage current of transistors due to the increased film stress. The major path of H/sub 2/O diffusion is gate edges, especially along the gate to drain/source overlap region, and, thus, decreases in channel width induces more leakage current than channel length.