The dielectric reliability of intrinsic thin SiO2films thermally grown on a heavily doped Si substrate—characterization and modeling

The dielectric reliability of the intrinsic thin SiO
2
films (∼ 110 Å) thermally grown on heavily doped n-type Si substrates has been studied by using the time-zero-dielectric-breakdown (ramp-voltage-stressed I-V) and time-dependent-dielectric-breakdown (constant-voltage-stressed I-t and constant-current-stressed V-t) tests. These experiments have been performed to investigate the variations of trapped electron density, interface state density, and field enhancement in a thin SiO
2
film stressed with different amounts of Charges. Moreover, the temperature effects on these parameters in a thin SiO
2
film have also been studied. A theoretical model considering the effects of dynamic trapping (i.e., trapping and detrapping), positive charge generation, weak spots, and robust area is proposed to describe the conduction mechanism and dielectric breakdown of a thin SiO
2
film. Important physical parameters such as barrier height, trapped electron density, trap capture cross section, and trap generation rate have been analyzed to interpret the temperature effects.