Manufacturing tolerance of capacitor coupled GaAs FET logic circuits

Interstage coupling of depletion mode GaAs digital circuits by means of capacitors has been proposed as a simply fabricated technique combining both low power and process tolerance. This is now substantiated by results of ring-oscillators and dividers, operating at up to 1 GHz, on wafers over which the FET pinch-off voltages vary between -0.5 V and -4.0 V.