Dynamic degradation in MOSFET's. II. Application in the circuit environment

For pt.I, see ibid., vol.38 no.8, pp.1852-1858, Aug. 1991. The physical effects discussed in Pt.I are classified with respect to real operation of devices in circuits from an engineer's viewpoint. Stress results from different kinds of logic stages are discussed and relations set up between static and dynamic lifetimes. It is shown that within certain limited error boundaries, the static approach is essentially valid as long as stress conditions are considered that are oriented to operation in digital logic. The transmission gate is investigated separately, because in this case specific phenomena caused by bidirectional stress must be considered.<
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