Hardware Simulation of Multi-Service Queues

In this article, we present the concept and preliminary implementation of hardware simulation for advanced multi-service queuing systems. Software simulation of such systems is possible, but the time required to obtain results of sufficient accuracy is unsatisfactory. Therefore, we attempted to implement the simulation in FPGA hardware chips. This requires the preparation of an appropriately faithful and unfortunately very complex model, which is time-consuming but results in obtaining satisfactory quality results in a short time, even for complex models.