Performance Analysis of 3D Stacked Memory Architectures in High Performance Computing

The increasing speed of the CPU is greater than that of the RAM. The ‘Memory Wall’ issue, which occurs when the processor runs out of data, could occur. The I/O infrastructure is strained as the number of cores in CMPs rises because more data is needed from the memory subsystem. Memory bandwidth becomes a bottleneck in terms of performance. By layering memories on top of logic, three-dimensional integrated circuits are proposed as a solution to this problem. The widely-used compute-in-memory benchmark framework ‘NeuroSim’ is utilized by us to investigate the benefits of a three-dimensional design for a Neural Network application.