Characteristics of a 1 Mbit/1 cm2magnetic bubble memory

The Texas Instruments 1 Mbit bubble memory device is fabricated in a 1 cm
²
area using 1.8 μm bubble material, a 6.75 μm by 7.5 μm cell size and 1 μm minimum permalloy features. The device architecture is block replicate. The device is organized into two identical 512 Kbit blocks each with 300 loops and 2049 storage locations per loop and each with an individual detector and generator. Design features include a set of generate, swap, and replicate gates compatible with planar processing, double period elements in the input and output tracks, and 15 μm period chevron expander columns in the detector. Device processing employs a planar, top-down sequence [1] to eliminate step coverage, plasma etching of AlCu leads, and direct step on wafer 10X projection printing for critical photolithography. Operating margins for packaged devices at 100 KHz, 62 Oe peak triangle drive are 14-18 Oe with current requirements of 13 mA-swap, 60 mA-replicate, 100 mA-generate, 4 mA-detect. The processing and gate designs of this 1Mbit device have been scaled to a smaller cell size, 4.75 μm by 5.25 μm, with a favorable reduction in operating current requirements.