Experimental Study on Transition Loss of On-Chip SIW Interconnects and Transmission Lines Using Two De-Embedding Reference Planes in 200 GHz Band Frequency

A method for calculating transition loss in long lowloss substrate integrated waveguide (SIW)-based transmission lines fabricated using commercial complementary metal-oxidesemiconductor (CMOS) technology is presented. To quantify the accurate transition loss, the proposed approach employed twostep de-embedding technique besides normal measurement setup calibration using impedance standard substrate (ISS) at two distinct reference points: the first mitigates measuring pad effects, and the second removes both pads and transition structures. By using the attenuation constants calculated from these reference planes, the intrinsic transition loss is estimated. From the experiment, a low transition loss is observed in the proposed SIW design, which varies between 0.2 dB and 1.3 dB over a wide measurement bandwidth of 120 to 220 GHz. The experimental results underscore the efficacy of the proposed method and suggest the potential for consistent performance above the current measurement threshold of 220 GHz, which could be pivotal for terahertz (THz) applications.