Temperature-Dependent Noise Performance of Single-Photon Avalanche Diodes and Active Quenching Circuits in 180-nm HV CMOS

The paper describes the temperature characterization of single-photon avalanche diodes (SPADs) and active quenching circuits (AQCs) designed and fabricated in a commercial 180-nm high-voltage (HV) bipolar-CMOSDMOS (BCD) technology. The SPAD structures utilize a deep, low-doped p-n junction as the avalanche multiplication layer, exploiting the high-voltage implant layers available in the technology. Different SPAD layouts (circular and square) are characterized in terms of current-voltage (I-V) curves, breakdown voltage, dark count rates (DCR), and afterpulsing for the temperature range from 250 to 350 K. We find that the square-shaped SPAD connected to an off-chip passive quenching circuit (PQC) exhibits a significantly higher afterpulsing probability at high excess voltages compared to the circular structure, particularly at low temperatures. The SPADs were connected to an active quenching circuit (AQC) integrated in the same technology, with the aim to suppress afterpulsing and reduce the dead time. Using the AQC, the afterpulsing probability for the square structure was reduced by more than 60% at 280 K, and the maximum count rate of the detector was increased by reducing the dead time to $\approx 800 \mathrm{~ns}$. The circular SPAD device cooled down to 250 K in combination with the AQC exhibits a state-of-the-art DCR of $1.4 \mathrm{mHz}/\mu \mathrm{m}^{2}$ at an excess voltage of 5 V.